The present invention relates to annealing dopants in silicon, particularly to pulsed laser annealing of dopants in silicon, and more particularly to a process by which retrograde dopant profiles can be fabricated in single crystal or polycrystalline silicon.
Pulsed lasers have been used to anneal dopants in silicon for over two decades. The technique of pulsed laser annealing has the unique property that the silicon is melted during the process and the total thermal cycle is less than one microsecond. Compared to conventional, non-laser annealing approaches, the pulsed laser technique eliminates a substantial number of processing steps which translates into cost savings in the overall manufacturing sequence. Due to the short total thermal cycle of the pulsed laser annealing technique, such causes the molten silicon to regrow at high velocities (between 1-10 meters/second). As a result, laser annealing is a non-equilibrium process. This departure from equilibrium during the regrowth process effects a physical parameter, known as the segregation coefficient, of dopant impurities located at the liquid/solid silicon interface. Normally less than 1, the segregation coefficient for the laser process becomes greater than 1, so, unlike in conventional techniques, particular dopants accumulate in the solid rather than in the liquid. Since the molten region regrows from the bulk towards the surface, the concentration of the dopant species is largest at some point (determined by the maximum penetration depth of the molten region) away from the silicon surface.
A profile with the characteristic of the impurity concentration increasing with depth is known as retrograde, because the gradient of the profile is reversed from that which is typical in an ordinary diffusion process. Such profiles are desired in any application where a higher electrical conductivity is desired in the bulk than at the surface of the silicon. A need exists for retrograde profiles in silicon integrate circuit (IC) manufacturing to form regions known as the n- and p-well in complementary metal oxide semiconductor (CMOS) transistor technology and the buried collector layer in bipolar transistor technology. That need is filled by the process of the present invention by which retrograde impurity profiles of dopants, such as boron, phosphorous, and arsenic, can be fabricated in single crystal (crystalline) or polycrystalline silicon in a simple, flexible, and inexpensive manner. The process involves melting doped silicon with a pulsed energy source in such a manner that when the liquid silicon transforms back to solid silicon, the recrystallization rate is in the range of 0.5-15 meters per second, preferably a rate that exceeds 0.5 meters per second but is lower than 15 meters per second.